Static and dynamic compact analytical model for junctionless nanowire transistors

Author(s)

Pavanello, Marcelo Antonio ^[1] ; Trevisoli, Renan ^[2] ; Doria, Rodrigo Trevisoli ^[1] ; de Souza, Michelly ^[1]

Affiliation

^[1] Ctr Univ FEI, Dept Elect Engn, Av Humberto de Alencar Castelo Branco 3972, BR-09850901 Sao Bernardo Do Campo - Brazil

^[2] Univ Fed ABC UFABC, Ave Estados 5001, BR-09210580 Santo Andre - Brazil

• Document type: Journal article
• Source: JOURNAL OF PHYSICS-CONDENSED MATTER; v. 30, n. 33 AUG 22 2018.
• Web of Science Citations: 3

Abstract

This paper presents a compact analytical model for the static and dynamic electrical characteristics of Junctionless Nanowire Transistors. The static drain current model formulation is derived from the 2D solution of the Poisson equation with appropriate boundary conditions and long-channel devices, leading to a continuous effective surface potential that accounts for the conduction in partial depletion and accumulation regimes. The long-channel model is modified to account for short-channel effects by using the coupled solution of 3D Laplace equation with the 2D Poisson equation. The substrate bias influence on the drain current is also included in the model formulation. The charges at the device terminals are differentiated with respect to the applied biases leading to an analytical description of the transconductances and transcapacitances. The proposed model is validated using experimental data at different bias conditions and temperatures, showing very good agreement. (AU)

• FAPESP's process: 14/18041-8 - Electrical characterization and modeling of advanced electronic devices
• Grantee: Renan Trevisoli Doria
• Support Opportunities: Scholarships in Brazil - Post-Doctoral