| Full text | |
| Author(s): |
Costa, Fernando J.
;
Trevisoli, Renan
;
Capovilla, Carlos Eduardo
;
Doria, Rodrigo T.
;
IEEE
Total Authors: 5
|
| Document type: | Journal article |
| Source: | 2022 36TH SYMPOSIUM ON MICROELECTRONICS TECHNOLOGY (SBMICRO 2022); v. N/A, p. 4-pg., 2022-01-01. |
| Abstract | |
The main objective of this work is to present an analysis of the performance of UTBB SOI transistors working as standard diodes, where the implementation of ground planes and substrate bias are analyzed. It is shown a reduced leakage current and increased ratio between the on and off-state currents with the substrate bias at -2 V and with a P-type GP implemented. However, both conditions result in increased threshold voltage. (AU) | |
| FAPESP's process: | 19/15500-5 - Atomistic simulation of nanowire MOSFETs electrical properties |
| Grantee: | Marcelo Antonio Pavanello |
| Support Opportunities: | Regular Research Grants |