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Junctionless Nanowire Transistors Based Wilson Current Mirror Configuration

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Author(s):
Shibutani, Andre B. ; de Souza, Michelly ; Trevisoli, Renan ; Doria, Rodrigo T. ; IEEE
Total Authors: 5
Document type: Journal article
Source: 2021 JOINT INTERNATIONAL EUROSOI WORKSHOP AND INTERNATIONAL CONFERENCE ON ULTIMATE INTEGRATION ON SILICON (EUROSOI-ULIS); v. N/A, p. 4-pg., 2021-01-01.
Abstract

In this paper, a Wilson current mirror based on junctionless nanowire transistors (JNTs) is evaluated for the first time. Considering that the Wilson current mirror exhibits an enhanced output resistance with respect to the common source configuration, this study is focused on verifying the mirroring accuracy of different transistor dimensions. Also, the work examines the impact of the transistor feedback circuit on the output resistance and the current transfer ratio. The current mirror has been evaluated through numerical simulations, which were calibrated to experimental data of single devices. (AU)

FAPESP's process: 19/15500-5 - Atomistic simulation of nanowire MOSFETs electrical properties
Grantee:Marcelo Antonio Pavanello
Support Opportunities: Regular Research Grants