Analytical Model for Cylindrical Junctionless Nanowire FETs

Author(s)

de Souza, Adelcio M. ; Celino, Daniel R. ; Ragi, Regiane ; Romero, Murilo A.

• Document type: Journal article
• Source: 15TH IEEE LATIN AMERICAN SYMPOSIUM ON CIRCUITS AND SYSTEMS, LASCAS 2024; v. N/A, p. 5-pg., 2024-01-01.

Abstract

This paper presents an analytical model for the I-V and C-V characteristics of cylindrical junctionless nanowire FETs. The obtained expressions are continuous and valid for all bias regimes, i.e., total depletion, partial depletion, and accumulation. Also, the formulation is entirely physics-based, with no fitting parameters, and very intuitive, since it describes the device as a gated resistor. Model validation is performed against TCAD results, demonstrating excellent agreement. (AU)

• FAPESP's process: 18/13537-6 - Compact modelling of MOS transistors based on quantum effects
• Grantee: Adelcio Marques de Souza
• Support Opportunities: Scholarships in Brazil - Doctorate
• FAPESP's process: 21/06569-1 - High-speed strategic internet technologies
• Grantee: Evandro Conforti
• Support Opportunities: Research Projects - Thematic Grants