Study and electrical characterization of transistors fabricated with different MOSFET technologies and their application in basic logic gates

• Grant number: 22/15090-4
• Support Opportunities: Scholarships in Brazil - Scientific Initiation
• Start date: February 01, 2023
• End date: January 31, 2024
• Field of knowledge: Engineering - Electrical Engineering - Electrical, Magnetic and Electronic Measurements, Instrumentation
• Principal Investigator: Paula Ghedini Der Agopian
• Grantee: Paulo Henrique do Amaral
• Host Institution: Faculdade de Engenharia. Universidade Estadual Paulista (UNESP). Campus Experimental São João da Boa Vista. São João da Boa Vista , SP, Brazil

Abstract

The continuous technological advance that we are experiencing today in the electronics field is largely due to the ability to build very small electronic circuits thanks to the MOSFETtechnology, which allows us to use nanometer-scale devices. Because of this, it is extremely important to understand its operation in depth, through the electrical characterization of this technology.In this scientific initiation project, it is proposed the experimental electrical characterization of two different CMOS technologies and complementing with the deepening of the understanding of the CMOS technology applied to basic logic circuits through experimental measurements and simulation of SPICE circuits. Initially, commercial MOSFETs will be explored with the CD4007 IC, which contains 3 nMOSFETs and 3 pMOSFETs transistors and allows us to interconnect them to form inverter, NAND and NOR circuits. Once this technology is characterized, we will measure 130 nm technology MOSFET transistors at USP and implement the logic gates through the AIM-SPICE simulator. From the behavior of the drain current and the basic parameters (threshold voltage, subthreshold slope and carrier mobility, for example) a comparative analysis will be carried out between the two technologies used and their performance when applied to logic gates.