| Full text | |
| Author(s): |
Trevisoli, Renan
[1]
;
Pavanello, Marcelo Antonio
[2]
;
Capovilla, Carlos Eduardo
[1]
;
Barraud, Sylvain
[3]
;
Doria, Rodrigo Trevisoli
[2]
Total Authors: 5
|
| Affiliation: | [1] Univ Fed ABC, Ctr Engn Modelagem & Ciencias Sociais Aplicadas, BR-09210580 Santo Andre, SP - Brazil
[2] Ctr Univ FEI, Elect Engn Dept, BR-09850901 Sao Bernardo Do Campo - Brazil
[3] Univ Grenoble Alpes, LETI, CEA, F-38054 Grenoble - France
Total Affiliations: 3
|
| Document type: | Journal article |
| Source: | IEEE TRANSACTIONS ON ELECTRON DEVICES; v. 67, n. 6, p. 2536-2543, JUN 2020. |
| Web of Science Citations: | 0 |
| Abstract | |
This article aims at proposing a compact analytical model for the low-frequency noise (LFN) of junctionless nanowire transistors (JNTs), operating at different bias conditions and temperatures. The model is validated through tridimensional numerical simulations, accounting for different trap configurations, as well as devices with different channel lengths, nanowire widths, and doping concentrations. Experimental results of short-channel junctionless transistors have also been used to demonstrate the model's applicability and accuracy. (AU) | |
| FAPESP's process: | 14/18041-8 - Electrical characterization and modeling of advanced electronic devices |
| Grantee: | Renan Trevisoli Doria |
| Support Opportunities: | Scholarships in Brazil - Post-Doctoral |