| Full text | |
| Author(s): |
Mariniello, Genaro
[1]
;
de Carvalho, Cesar Augusto Belchior
[1]
;
Paz, Bruna Cardoso
[2, 3]
;
Barraud, Sylvain
[2, 3]
;
Vinet, Maud
[2, 3]
;
Faynot, Olivier
[2, 3]
;
Pavanello, Marcelo Antonio
[1]
Total Authors: 7
|
| Affiliation: | [1] Ctr Univ FEI, Av Humberto, AC Branco 3972, BR-09850901 Sao Bernardo Do Campo - Brazil
[2] MINATEC Campus, LETI, CEA, BR-38054 Grenoble 9 - Brazil
[3] Univ Grenoble Alpes, BR-38054 Grenoble 9 - Brazil
Total Affiliations: 3
|
| Document type: | Journal article |
| Source: | Solid-State Electronics; v. 185, NOV 2021. |
| Web of Science Citations: | 0 |
| Abstract | |
This paper presents the fundamental analog figures of merit, such as the transconductance, output conductance, transconductance over drain current ratio, intrinsic voltage gain and harmonic distortion (or non-linearity), of ntype vertically stacked nanowires with variable fin width and channel length. To have a physical insight on the results, the basic electrical parameters such as threshold voltage, subthreshold slope and low field electron mobility of the analyzed transistors were also studied. The studied analog parameters are presented in function of the transconductance over drain current, to allow for the comparison at the same inversion level. (AU) | |
| FAPESP's process: | 19/15500-5 - Atomistic simulation of nanowire MOSFETs electrical properties |
| Grantee: | Marcelo Antonio Pavanello |
| Support Opportunities: | Regular Research Grants |