| Full text | |
| Author(s): |
Shibutani, Andre B.
;
Trevisoli, Renan
;
Doria, Rodrigo T.
;
IEEE
Total Authors: 4
|
| Document type: | Journal article |
| Source: | 2022 36TH SYMPOSIUM ON MICROELECTRONICS TECHNOLOGY (SBMICRO 2022); v. N/A, p. 4-pg., 2022-01-01. |
| Abstract | |
In this paper, a cascode current mirror compounded by junctionless nanowire transistors is analyzed for the first time. Thus, the performance and the mirroring precision of the configuration were investigated considering the internal circuit feedback and the high output resistance. On this basis, symmetrical and asymmetrical configurations were examined to comprehend the junctionless nanowire transistor behavior as a current source. (AU) | |
| FAPESP's process: | 19/15500-5 - Atomistic simulation of nanowire MOSFETs electrical properties |
| Grantee: | Marcelo Antonio Pavanello |
| Support Opportunities: | Regular Research Grants |