| Author(s): |
Trevisoli, Renan
;
Doria, Rodrigo T.
;
de Souza, Michelly
;
Pavanello, Marcelo A.
;
Barraud, Sylvain
;
Vinet, Maud
;
IEEE
Total Authors: 7
|
| Document type: | Journal article |
| Source: | 2016 IEEE SOI-3D-SUBTHRESHOLD MICROELECTRONICS TECHNOLOGY UNIFIED CONFERENCE (S3S); v. N/A, p. 3-pg., 2016-01-01. |
| Abstract | |
This work presents, for the first time, an analysis of the influence of the crystal orientation on the electrical performance of Junctionless Nanowire Transistors. Experimental results demonstrate that the device rotation from the standard <110> to the <100> direction over a (100) SOI wafer can significantly degrade the performance of the transistors. (AU) | |
| FAPESP's process: | 14/18041-8 - Electrical characterization and modeling of advanced electronic devices |
| Grantee: | Renan Trevisoli Doria |
| Support Opportunities: | Scholarships in Brazil - Post-Doctoral |